NowRift — Software & Technology News Platform

HardwareRIFT LEAD

DRAM Chips Are Gearing Up To Perform Calculations Directly

New research demonstrates DRAM's potential to compute, bypassing the CPU and accelerating AI and data-intensive tasks.

29 Aug 2026

Newsletter

THE DAILY RIFT

Five shifts. Five minutes. No noise.

•Verified technology intelligence
•Emerging patterns before the hype
•Direct action steps for builders & founders

No spam. Unsubscribe anytime. Powered by Beehiiv.

All Intelligence AI Models Developers Cybersecurity Hardware Founders Creators Data Science

Today's Intelligence

HardwareAug 28

Sapphire Surface Modification Yields Wafer-Scale 2D Semiconductor Crystals

Peking University researchers developed a method to grow high-quality 2D semiconductor crystals on sapphire substrates, paving the way for large-scale production.

●Builder Action:Developers can anticipate new possibilities for building high-performance electronic and optoelectronic devices using wafer-scale 2D semiconductors. The ability to grow WS2 and MoS2 on modified sapphire substrates means more uniform and defect-free materials, enabling higher transistor speeds and improved sensor performance. This research potentially simplifies integration pathways for 2D materials into larger systems, moving beyond small-flake research to manufacturable components.

HardwareAug 28

UM-Dearborn Generative Design Optimizes Liquid Cooling for 2.5D/3D Packages

New physics-guided framework creates efficient liquid cooling channels for high-density chip packages, addressing critical thermal challenges.

●Builder Action:Developers working on high-performance computing, AI accelerators, or advanced graphics should be aware that traditional thermal solutions are reaching their limits. This research demonstrates how generative design, guided by physics simulations, can create highly efficient, custom liquid cooling channels for 2.5D and 3D packages. Expect to see more complex, organic cooling channel designs integrated into future high-density processors, potentially enabling higher performance ceilings and improved thermal stability.

HardwareAug 28

Ferroelectric Tuning Solves LLM Training Bottlenecks, Georgia Tech Finds

New research demonstrates a 2.7x speedup in LLM training by mitigating communication stalls with ferroelectric tuning.

●Builder Action:Developers training large MoE LLMs on wafer-scale systems can expect significantly faster training times. The Georgia Tech research validates a technique that reduces communication stalls by 2.7x, allowing more compute time. This means faster model iteration and potentially lower cloud compute costs for intensive training tasks.